Delamination in Semiconductor IC by TSV due to Thermal and Surface Stresses
Abstract
in the Through-silicon via (TSV) technology structure in the IC of microelectronic. Delamination happens in microelectronic usually from
extrinsic stress such as scratching, arcing, and peeling, but it will also happen in intrinsic stress due to internal forces. Internal stresses such as
axial stress, shear stress, radial stress and circumferential stress happen to create surfaces and thermal stress in the material contact in the TSV.
This issue will create potential stress delamination in the TSV then formation of crack and failure. In fully filled TSV, analytical calculation
and material selection of the deposition in TSV are used to tackle the TSV delamination to extend its product lifetime.
Keywords
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DOI: http://dx.doi.org/10.70711/frim.v3i5.6488
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